1. Technical Field
The present invention relates generally to a process in the manufacturing of semiconductor devices. More, specifically, the present invention relates to a process for defining three regions on a semiconductor wafer with only one masking step.
2. Background Art
Photolithography has long been used to define and form semiconductor devices. Photolithography consists of depositing a photoactive resist on the semiconductor device and exposing the resist through a mask such that portions of the mask are exposed to radiation, and other portions are not exposed. If the resist was positive tone resist, then the portions of the resist which were exposed wash away during development. If the resist was a negative tone resist, then the portions of the resist which were not exposed during exposure wash away during development. Thus, conventional prior art is able to define two regions using a masking step, ie., the all the areas where resist is removed during development, and all of the areas where resist remains after development.
If further definition of the device is needed, a second layer of resist and a second exposure and development will be required. The use of multiple exposure steps through multiple masks has several disadvantages. First, the inherent complexity of adding additional processing steps reduces the efficiency of the fabrication line. Secondly, it is almost impossible to line up the second mask exactly with the first. This variation in masking alignment is commonly referred to as overlay error.
Thus what is needed is an improved fabrication process that allows for the definition of multiple areas using single masking steps such that processing complexity and the propensity of overlay error is reduced.